A Flexible 2D Materials Process Scheme for an Equivalent 1 nm Technology Node
A recent study published in Nano-Micro Letters (Springer Nature) proposes an equivalent 1 nm technology node based on 2D materials through a cross-scale evaluation framework. This article investigates how MoS₂ nanosheet field-effect transistors (NSFETs) could provide an alternative technology pathway to conventional silicon complementary field-effect transistors (Si-CFETs) for future ultra-scaled devices.
The work combines device fabrication, technology computer-aided design, SPICE-based circuit simulation and system-level performance evaluation to benchmark a proposed "2D eq 1 nm" technology node against existing silicon-based approaches.
A comprehensive and flexible process framework
Rather than focusing on a single device demonstration, the authors developed a cross-scale framework integrating material parameter calculations, device simulation, circuit simulation and system-level evaluation. The proposed process scheme enables evaluation from the material level to the processor level.
Within this framework, MoS₂ NSFETs were designed and fabricated to extract device parameters for model calibration. The study then compared a conventional 1 nm Si-CFET process with a horizontally scaled 2D-NSFET architecture having the same average device footprint.
The results demonstrate the feasibility of replacing silicon-based CFETs at the 1 nm node with 2D-NSFETs, proposing what the authors define as a "2D eq 1 nm" technology solution. Under the reported benchmarking conditions, the ultra-scaled 2D-NSFET achieved a 36% increase in operating frequency at fixed power consumption. Furthermore, the horizontally miniaturised device demonstrated a 28% frequency increase at fixed power consumption and exhibited a similar performance trend when implemented within a 16-bit RISC-V CPU.
MicroWriter ML3 in the fabrication process
The experimental fabrication process also highlights the use of the MicroWriter ML3 laser direct writing system from Durham Magneto Optics. As reported by the authors, all lithographic patterning processes throughout the sample preparation process were performed using the MicroWriter ML3.
In this context, the MicroWriter ML3 helped accelerate the development of the MoS₂-based devices by enabling rapid design iterations without the need to produce new photomasks for every layout modification. Direct exposure from GDS files supported continuous optimisation of critical device geometries, while the flexibility to pattern small samples and individual dies made the system particularly well suited to 2D materials research. In addition, the surface-trackingautofocus automatically compensated for sample topography variations, ensuring reliable exposures on experimental substrates and heterogeneous material stacks. Together, these capabilities contributed to a faster, more flexible and more efficient device development workflow.
This work provides a valuable benchmark for evaluating 2D semiconductor technologies through a cross-scale methodology. By combining experimental device fabrication with multi-scale simulation, the proposed framework offers a structured methodology for assessing the circuit- and system-level impact of 2D materials while exploring a potentially lower-cost process scheme for an equivalent 1 nm technology node.
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